The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 04, 1999
Filed:
May. 23, 1996
Paul Gregory Greenstein, Croton-on-Hudson, NY (US);
Richard Roland Guyette, LaGrangeville, NY (US);
John Ted Rodell, Wapplingers Falls, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Apparatus for protecting memory storage blocks (page frames) against unwanted I/O accesses, including I/O data transferred in an unwanted direction. I/O storage keys are provided in an I/O protection array. Each I/O key is comprised of one or two bits and is associated with a respective storage block in computer memory. If the array contains two bit I/O keys, each key has 4 settings for controlling I/O accesses to an associated storage block; which: 1) inhibit an I/O access in the input direction of I/O data flow, 2) inhibit an I/O access in the output direction of I/O data flow, 3) allow I/O accesses in both directions, or 4) prevent all I/O accesses. If the array contains single bit I/O storage keys, each key has two settings, which: 1) prevent all I/O accesses in the associated storage block, or 2) allow all I/O accesses in the associated block. No I/O program keys are needed for controlling this type of I/O protection, which avoids key comparison operations by the I/O access protection apparatus. Nevertheless, the use of the subject I/O protection apparatus does not prevent the use of apparatus for protecting the same storage blocks from unwanted accesses by central processors, which may use CPU storage keys. Such CPU storage keys may be contained in a hardware array, or may be contained in a virtual storage page table without having any hardware CPU storage key array. If desired, the subject I/O storage protection apparatus may be used without providing any CPU storage protection.