The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 1999

Filed:

Dec. 19, 1996
Applicant:
Inventor:

Brian R Bennett, Laguna Niguel, CA (US);

Assignee:

AST Research, Inc., Irvine, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
711138 ; 39518305 ; 39518314 ; 39518315 ; 395704 ; 395568 ;
Abstract

A system for facilitating debugging of software running within an information processing unit includes an external trigger state machine which selectively overrides the cacheability attribute of a cache line. An in-circuit emulator (ICE), which is used for debugging purposes, monitors addresses read by and written to a CPU. If an address which is of interest for debugging purposes is detected by the ICE, then the ICE issues a trigger signal. The trigger signal causes the external trigger state machine to designate the cache line associated with the detected address as a non-cacheable operation (i.e., to override the cacheability attribute) . Thus, the data associated with the cache line is written out to the main memory module where the data can be observed by an ICE, rather than to an internal cache memory location where the data would be invisible to an ICE. In a preferred embodiment of the invention, the external trigger state machine is configured to operate in a pipelining environment wherein multiple requests may be outstanding at one time.


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