The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 27, 1999
Filed:
May. 15, 1997
Applicant:
Inventor:
Mark Leonard Buer, Chandler, AZ (US);
Assignee:
VLSI Technology, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
371 491 ; 371 221 ; 361729 ; 340679 ;
Abstract
Secure operations within an integrated circuit are protected. In order to perform the protection a plurality of single event upset detectors are distributed within the integrated circuit. The single event upset detectors include bit-registers. Each of the plurality of the single event upset detectors is monitored for a single event upset. When a single event upset in any of the single event upset detectors is detected, an error condition is indicated.
Buer, Mark. (1999). Single event upset detection and protection in an integrated circuit (U.S. Patent No. 5898711). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5898711
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile