The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 1999

Filed:

Nov. 12, 1996
Applicant:
Inventor:

Chul-Soo Kim, Kyungki-do, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
371 211 ; 324765 ;
Abstract

A test signal generator and method for testing a semiconductor wafer having a plurality of memory chips. A plurality of input buffers buffer test timing signals applied through a plurality of input terminals to the memory chips in test mode. A direct current source supplies a direct current of a given level to each of the terminals. The direct current source comprises a MOS transistor for supplying the direct current including a fuse with a first node connected between the terminal and buffer and a second node for receiving the direct current. The fuse is cut by an electric or laser cutter after wafer testing is complete. This enables a probe card for performing the wafer testing to be fabricated with a reduced number of probe tips, thereby overcoming the limitation of a test driver and allowing the simultaneous testing of semiconductor wafers having a plurality of memory chips having different pad configurations.


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