The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 1999

Filed:

Jan. 28, 1998
Applicant:
Inventor:

Mamoru Fujita, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
327296 ; 327295 ; 327291 ; 365233 ; 36523008 ; 365193 ;
Abstract

External control signals are input to a semiconductor memory device via a synchronizing semiconductor circuit. An internal clock (ICLK) in the synchronizing semiconductor circuit is produced as a phase shifted version of an external clock (S11) which is input to the memory device. First latch circuits (321-324) latch external control signals in response to the external clock (S11). Decoder circuits (331.sub.0 -331.sub.n) produce internal control signals (S31.sub.0 -S331.sub.n) based upon the latched signals (S21-S24) output from the first latch circuits (321-324). Second latch circuits (341.sub.0 -341.sub.n) latch the internal control signals (S31.sub.0 14 S31.sub.n) in response to the internal clock signal (ICLK).


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