The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 27, 1999
Filed:
Dec. 23, 1996
Robert M Gardner, Gilbert, AZ (US);
Jerald A Hallmark, Gilbert, AZ (US);
Daniel S Marshall, Chandler, AZ (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A ferroelectric memory array (20) monolithically integrated with a field programmable gate array (32) into a semiconductor circuit (10). The ferroelectric memory array (20) is suitable for a semiconductor manufacturer to program the configuration data that is used in the field programmable gate array (32) prior to shipment and installation in an electronic system. The memory array (20) provides the data that configures the field programmable gate array (32) for functionality of the Configurable Logic Blocks (CLBs) in the field programmable gate array (32). Should the field programmable gate array (32) circuit lose power, the non-volatile memory array (20) provides a shift register (26) with the data to reconfigure the field programmable gate array (32).