Input/output section of an integrated circuit having separate power down

Abstract

A personal information device is provided, which includes an integrated circuit coupled to a variety of peripheral devices. The integrated circuit is configured with a core section and one or more input/output sections. The core section is powered independently of the input/output sections, allowing selective power down of peripheral components coupled to the integrated circuit without the use of external buffers. The input/output sections are configured with unique input/output circuits which perform the buffering task. The integrated circuit is further configured with a partial reset. The partial reset selectively forces portions of the integrated circuit to an initial state while other portions continue to operate. One particular embodiment of the integrated circuit is configured with a CPU and an RTC unit which comprises configuration RAM and a real time clock facility. When the partial reset is activated, the RTC unit is not reset but the CPU is reset. When the personal information device detects the need to conserve power, the power supply or a reset unit asserts the partial reset. Additionally, the power supply powers down selected peripheral components and the associated input/output driver sections while retaining power to the core section. Time/date and configuration information is therefore retained and power consumption is reduced.