The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 1999

Filed:

Jan. 05, 1998
Applicant:
Inventor:

Patrick Johnston, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257691 ; 257690 ; 257693 ; 257698 ;
Abstract

A semiconductor device (100) including a die (110) electrically connected to a substrate (120), wherein the substrate has a novel interconnect routing structure. The routing structure has a plurality of interconnects (122) including a plurality of intermediate vias (140), including both intermediate vias associated with supply interconnects and signal interconnects, that are clustered together to reduce undesirable mutual loop inductance (L.sub.m) and reduce switching noise (.DELTA.I). A plurality of first printed wires (128a) and a plurality of second printed wires (128b) may incorporated in the substrate for routing of the plurality intermediate vias in cluster form. The substrate may have a plurality of clusters of the intermediate vias.


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