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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 5897343 B1

PDFFull Text
Date of Patent:
Apr. 27, 1999

Filed:

Mar. 30, 1998

Method of making a power switching trench mosfet having aligned source

Applicant:
Inventors:

Leo Mathew, Chandler, AZ (US);

Keith G Kamekona, Scottsdale, AZ (US);

Huy Trong Tran, Gilbert, AZ (US);

Prasad Venkatraman, Gilbert, AZ (US);

Jeffrey Pearse, Chandler, AZ (US);

Bich-Yen Nguyen, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumuburg, IL (US);

Attorneys:

Atkins; Robert D.

Parker; Lanny L.

Primary Examiner:

Tuan H Nguyen

Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438133 ; 438138 ; 438270 ;
Abstract

A trench power switching transistor (10) is fabricated having sub-micron features on a body layer (26) without using sub-micron lithography. An opening in a field oxide layer (28) defines an area for implanting a source region (30) in the body layer (26) that is self-aligned to a first edge (28A) and a second edge (28B) of the field oxide layer (28). Sidewall spacers (32) are formed in accordance with the first and second edges (28A and 28B) of the field oxide layer (28). A trench is aligned to the sidewall spacers (32) and formed centered within the source region (30). An implant layer (42) formed between sections of the power switching transistor (10) is aligned to the sidewall spacers (32) at the first and second edges (28A and 28B).

Find Patent Forward Citations

Mathew, Leo. (1999). Method of making a power switching trench mosfet having aligned source (U.S. Patent No. 5897343). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5897343

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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