The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 20, 1999

Filed:

Aug. 23, 1997
Applicant:
Inventor:

David Gerard Spaniol, Phoenix, AZ (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395287 ; 395280 ; 395306 ; 395311 ;
Abstract

Within a single integrated circuit, a bus operates in accordance with a bus protocol. The bus protocol includes a first control signal which, when not implemented within a single integrated circuit, is implemented using a pull-up resistor and tri-state gates within functional blocks attached to the bus. A first functional block includes a first input line for receiving an input component of the first control signal, and includes first logic means for generating a first output component of the first control signal. A second functional block includes a second input line for receiving the input component of the first control signal, and includes second logic means for generating a second output component of the first control signal. A logic block includes first logic for generating the input component of the first control signal. The first logic utilizes the first output component and the second output component to generate the input component of the first control signal.


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