The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 1999
Filed:
Aug. 11, 1997
Applicant:
Inventor:
Hiroyuki Nakao, Hyogo, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523006 ; 36523003 ; 3652385 ; 365201 ;
Abstract
In a DRAM column decoder, an OR gate receiving a test signal and an output of a column decoder unit circuit is provided corresponding to each column select line. When test signal is at the active 'H' level, all column select lines attain the 'H' level and all column select gates are rendered conductive, allowing collective writing row by row. A separate circuit for collective writing is not required, so that the layout area is reduced.
Nakao, Hiroyuki. (1999). Semiconductor memory device having collective writing mode for writing (U.S. Patent No. 5896342). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5896342
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile