The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 20, 1999

Filed:

Sep. 16, 1996
Applicant:
Inventor:

John Laurence Melanson, Boulder, CO (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
341143 ; 341120 ;
Abstract

In a delta sigma modulator, generally comprising one or more integrators fed into a multilevel quantizer, the output of which is the output of the delta sigma modulator and is also fed through a digital to analog converter in a feedback loop to the integrators, the quantizer is made sparse, i.e. the levels output by the quantizer are not evenly spaced, but rather are closely spaced for small deviations from 0 V, and broadly spaced for large deviations from 0V. The A/D converter in the feedback is matched to the quantizer. For example, the levels might be -1 V, -1/8 V, 0V, 1/8 V, and 1 V. The digital output signal from the sparse quantizer is fed into a correction RAM, which corrects for nonlinearities in the D/A converter before the digital signal is filtered by a low pass filter and frequency down converted. The contents of the RAM are selected whenever the A/D conversion system is powered on. The contents of the RAM are selected by closing a series of sets switches in the A/D converter and adjusting the output of the RAM to 0.


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