Input port electrostatic discharge protection circuit for an intergrated

Abstract

An input port electrostatic discharge protection circuit is disposed between the input port of an integrated circuit and an input point of an internal circuit of the integrated circuit. The input port electrostatic discharge protection circuit includes a resistor and a field device. The ends of the resistor are connected to the input port of the integrate circuit and the input point of the internal circuit, respectively, and the function of the resistor is to delay ESD pulses for preventing the input port of the internal circuit from a strike directly. The field device has double gates disposed on field oxides. The source and drain of the field device are coupled to the input port of the integrated circuit and a low-voltage source, respectively. The first gate is coupled to the drain of the field device while the second grate is coupled to the source of the field device. The field device mainly provides an ESD path. An additional metal-oxide-semiconductor (MOS) device without a lightly doped drain (LDD) structure can be positioned between the input point of the internal circuit and the low-voltage source to thereby speed-up triggering of the field device to an 'on' state. Moreover, an additional field device with the same double gates as the above-referred field device can also be disposed between a high-voltage source of the integrated circuit and the input port of the integrated circuit to enhance ESD protection.