The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 13, 1999
Filed:
Jul. 08, 1997
Younes Lotfi, Round Rock, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A memory cell with multiple read ports uses fewer NMOS devices, has reduced size, and provides improved performance if less than all of the read ports are used. The memory cell has a flip-flop with a storage node, a write port, and a read port having a plurality of bit lines connected to respective NMOS transistors which are controlled by respective read wordlines, and these NMOS transistors are coupled to ground via one or more additional NMOS transistor whose gates are connected to the storage node. The width of the latter NMOS transistors is larger than the width of the former transistors which are connected to the bit lines. For example, there might be three bitlines connected respectively to three of the first NMOS transistors, which are further connected to only one second NMOS transistor, wherein the second NMOS transistor is about three times as wide as any one of the three first NMOS transistors. The read port provides improved performance if less than all of the read ports are used due to the stronger conduction of the common NMOS device.