Method for manufacturing semiconductor memory device

Abstract

A method for manufacturing a semiconductor device comprising a first conductivity type semiconductor substrate, a memory cell region and a peripheral circuit region formed on the substrate, the memory cell region and the peripheral circuit region having a plurality of second conductivity type transistors (Tr's), which comprises the steps of:(i-a) forming source/drain regions in a memory cell formation region (MCFR) on the substrate by implanting a second conductivity type impurity, (ii-a) forming a gate insulating film and gate electrodes on the MCFG and a peripheral circuit formation region (PCFR) of the substrate, thereby providing the plurality of second conductivity type Tr's in the MCFG, (iii-a) implanting a first conductivity type impurity into the entire surface of the substrate with the gate electrodes used as a mask to form a device isolation region in the MCFG and, at the same time, to allow the first conductivity type impurity to be contained to a predetermined depth in a second conductivity type Tr formation region of the PCFR, and (iv-a) forming a mask pattern on the MCFR for masking the MCFR, and implanting a second conductivity type impurity to a predetermined depth into the second conductivity type Tr formation region of the PCFR with the mask pattern and the gate electrode used as a mask to form second conductivity type source/drain regions.