The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 1999
Filed:
Oct. 18, 1996
Amjad Qureshi, San Jose, CA (US);
Kab Ju Moon, Cupertino, CA (US);
Samsung Electronics Co., Ltd., Seoul, KR;
Abstract
An SDRAM initialization and power on system includes a configuration validation circuit for registers in a Memory Controller Unit and a Power On Sequence State Machine. The validation circuit asserts a status signal Config.sub.-- OK if the configuration of the memory control unit is correct. The signal Config.sub.-- OK enables the Power On Sequence State Machine. A status signal PowerOn.sub.-- OK is asserted once the SDRAMs have been initialized. The SDRAMs are not accessible for normal operation unless Config.sub.-- OK and PowerOn.sub.-- OK are asserted. By monitoring the two signals Config.sub.-- OK and PowerOn.sub.-- OK, debugging can be much more efficient and corruption of SDRAMs with bad data can be avoided.