The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 1999

Filed:

Apr. 22, 1996
Applicant:
Inventors:

Michael R Tan, Menlo Park, CA (US);

Albert T Yuen, Cupertino, CA (US);

Shih-Yuan Wang, Palo Alto, CA (US);

Ghulam Hasnain, Stanford, CA (US);

Yu-Min Houng, Cupertino, CA (US);

Assignee:

Hewlett-Packard Company, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01S / ;
U.S. Cl.
CPC ...
372 96 ; 372 43 ; 372 45 ;
Abstract

A substantially n-type substrate structure having a p-type surface for use in semiconductor devices as a substitute for a p-type semiconductor substrate. The substrate structure comprises a substrate region and a buffer region. The substrate region is a region of n-type compound semiconductor, and includes a degeneratively n-doped portion adjacent its first surface. The buffer region is a region of compound semiconductor doped with a p-type dopant. The buffer region is located on the first surface of the substrate region and includes a surface remote from the substrate region that provides the p-type surface of the substrate structure. The buffer region also includes a degeneratively p-doped portion adjacent the degeneratively n-doped portion of the substrate region. The substrate structure includes a tunnel junction between the degeneratively n-doped portion of the substrate region and the degeneratively p-doped portion of the buffer region. The substrate structure is made by degeneratively doping a substrate region of n-type compound semiconductor material adjacent its first surface with an n-type impurity, and depositing a layer of compound semiconductor material doped with a p-type impurity on the first surface of the substrate region to form a buffer region that includes a surface remote from the substrate region. In the course of depositing the compound semiconductor material to form the buffer region, the compound semiconductor material is degeneratively doped with the p-type impurity at least in a portion adjacent the substrate region to form a tunnel junction between the substrate region and the buffer region.


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