Non-volatile semiconductor memory device with variable source voltage

Abstract

In a non-volatile semiconductor memory device, a memory cell array composed of a plurality of non-volatile memory cells is provided. Each word line is connected to a row of the memory cell array, and each bit line is connected to a column of the memory cell array. The memory cell array is divided into N blocks (N is an integer more than 1) in a row direction. A control signal generating section monitors erase operations to each of the N blocks to generate an erase operation history data for each of the N blocks and generates a control signal for each of the N blocks other than a selected block based on the erase operation history data for the corresponding block, when a write operation is performed to the selected block. A source voltage generating section generates a source voltage for each of the N blocks other than the selected block based on the corresponding control signal to supply the generated source voltage to a common source node of the corresponding block, when the write operation is performed to the selected block.