The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 1999
Filed:
Nov. 15, 1996
Applicant:
Inventor:
Akihiko Hashiguchi, Kanagawa, JP;
Assignee:
Sony Corporation, , JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327333 ; 327211 ; 327208 ; 326 81 ; 326 68 ;
Abstract
In a level conversion circuit where the input signal is input via a flip-flop which sets its output in a high impedance state during the holding state, by adding a circuit which sets the output voltage to a predetermined potential level when the output of the flip-flop is in a high impedance state, the leakage current is reduced and a clock skew is prevented, to result in a stable operation of the level conversion circuit.
Hashiguchi, Akihiko. (1999). Level conversion circuit controlled by clock signal (U.S. Patent No. 5892385). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5892385
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile