The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 1999

Filed:

Mar. 08, 1993
Applicant:
Inventor:

Steven M Zimmerman, Durham, NC (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01J / ;
U.S. Cl.
CPC ...
313495 ; 313461 ;
Abstract

A FED device is manufactured as a self-aligned structure that allows the FED device to be fabricated in any desired size. The FED device has a transparent face plate with a thin film phosphor layer deposited thereon. A conductive anode layer is deposited on the phosphor layer. This anode layer has apertures allowing electron impingement on the phosphor layer. One or more insulator layers serving as a spacer are deposited on the anode layer. A conductive extraction grid layer is deposited upon the insulator layers. The conductive extraction grid layer, the spacer insulator layers and said anode layer are then etched to form an array of vacuum space holes extending to said phosphor layer. A conformal layer of a material that can be selectively etched is then deposited over the structure. The conformal layer fills and forms cusps over the vacuum space holes. An electron emitter layer is deposited over the conformal layer and is molded in the form of an array of sharply pointed structures separated from the extraction grid. An emitter insulator layer is deposited on the emitter layer and in contact with it. The emitter layer and said emitter insulator are etched to form access holes communicating with the vacuum space holes. The conformal layer is then selectively etched through these access holes to again open the vacuum space holes between the cathode emitter and the phosphor layer. An envelope is sealed to the face plate enclosing the emitter layer, extraction grid layer and said phosphor layer in a vacuum.


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