Low bit rate coding system for high speed compression of speech data

Abstract

A data array forming circuit replaces part of software operation in a low bit rate coding system. The circuit includes a memory storing plural kinds of basic data groups, and an address generating circuit generating an address to access the memory. A data array is formed in accordance with input speech data by selectively reading plural kinds of blocks out of the basic data groups according to the address and by combining the plural read blocks containing different quantities of words. Each block contains an arbitrary quantity of word data. In a data sorting circuit to replace part of software operation in a low bit rate coding system, an index corresponding to the data is set with an initial value on initiating the sorting operation, and a value incremented successively from the initial value is set as an index of the next data. In a convolution coding circuit, test data are set in parallel into the shift register, by providing each input terminal of shift register flip-flops with a selector having two input terminals. One terminal is input with test data, or each flip-flop may be provided with a preset terminal and a clear terminal, where a preset signal according to the test datum is input to the preset terminal, and a clear signal is input to the clear terminal.