The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 1999
Filed:
May. 05, 1997
Applicant:
Inventors:
Albert Bergemont, Palo Alto, CA (US);
Min-hwa Chi, Palo Alto, CA (US);
Assignee:
National Semiconductor Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518518 ; 36518529 ; 36518526 ; 257315 ;
Abstract
A high density EEPROM cell array structure utilizes a floating gate architecture for the access transistor and a double poly process in which the control gate and floating gate of both the access transistor and the memory cell are self-aligned, resulting in a much more compact cell than previously available. In addition, the process flow utilizes only two masks compared to the four mask flow utilized in the prior art. This leads to cost reduction in the fabrication process. The structure results in significantly reduced read time for the cell array.