The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 1999
Filed:
Jul. 15, 1997
G Glenn Henry, Austin, TX (US);
Arturo Martin-de-Nicolas, Austin, TX (US);
Daniel G Miner, Austin, TX (US);
Integrated Device Technology, Inc., Santa Clara, CA (US);
Abstract
An apparatus and method for smart configuration of functional blocks within a semiconductor device is provided. A fuse array contains a plurality of fuses that are blown in manufacturing to enable/disable functional blocks on the semiconductor device. A control unit reads the state of the fuses, and logically merges the fuse states with a default configuration for the functional blocks. The result of the merge operation is stored in a feature control register that individually enables/disables the functional blocks. The control unit also receives a write command from an external source that modifies the feature control register, after the device is shipped from the manufacturer. The control unit selectively blocks writes to the feature control register that attempt to enable/disable functional blocks that should not modified.