Memory device having page copy mode

Abstract

A memory device has a page copy mode that writes data into memory cell by memory page units by using a common bit line without outputting accessed data externally. The memory device, e.g., a DRAM includes an interface unit having an address multiplexor for multiplexing a plurality of address signal bits in accordance with a row address strobe signal. A row address resetting unit is for resetting an output signal from the address multiplexor in accordance with the row address strobe signal. A pre-decoder decodes an output signal from the row address resetting unit. A row decoder is for decoding an output signal from the pre-decoder. A word line driving unit receives an output signal from the row decoder to drive a corresponding word line. A block decoding signal latch unit latches an output signal from the pre-decoder in accordance with a page copy signal. A block decoder decodes an output signal from the block decoding signal latch unit and a sense amplifier controller receives an output signal from the block decoder. The sense amplifier controller outputs a sense amplifier enabling signal and a sense amplifier equalizing signal to a sense amplifier driving unit.