The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 23, 1999
Filed:
Nov. 07, 1997
Richard Billings Merrill, Woodside, CA (US);
Inderjit Singh, San Jose, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
An integrated circuit package assembly is disclosed herein and includes at least one integrated circuit chip having a plurality of chip input/output terminals, an arrangement for providing electrical communication between said input/output terminals and components external to said package, and an electrical inductor arrangement. The electrical inductor arrangement includes an origination terminal, a termination terminal, at least one intermediate connecting surface and a bonding wire positioned within the package. A first segment of the bonding wire is electrically connected with the origination terminal and a second segment is electrically connected with the termination terminal. Furthermore, the bonding wire has at least one intermediate point along it's length physically connected with one intermediate connecting surface. In one embodiment, the bonding wire is continuous along its length. At least two of the bonding wire segments extend in general directions which are non-collinear with respect to one another such that the continuous bonding wire can be electrically energized so as to function as an inductive loop.