The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 23, 1999
Filed:
Jun. 14, 1996
Seiji Ochi, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
A semiconductor device includes a semiconductor substrate; a semiconductor laminated structure including a first barrier layer, a conduction layer including a natural superlattice, and a second barrier layer, disposed on the semiconductor substrate. The first barrier layer, the conduction layer, and the second barrier layer produce heterojunctions that confine charge carriers within the conduction layer. The first barrier layer has steps at the surface contacting the conduction layer, the steps including, alternatingly arranged, a first crystal plane having a first orientation and a second crystal plane having a second orientation. The conduction layer includes first portions where the natural superlattice is ordered and second portions where the natural superlattice is disordered, the first and second portions being disposed on the first and second crystal planes, respectively. The degree of order in the conduction layer is higher in the first portions than in the second portions. Thus, the band gap energy of the conduction layer is lower in the first portions than in the second portions, and charge carriers are confined within the first portions by the second portions. As a result, a semiconductor device in which the first portions function as high-performance quantum wires is realized.