The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 1999

Filed:

Sep. 18, 1996
Applicant:
Inventors:

Youn-Tae Kim, Daejeon, KR;

Chi-Hoon Jun, Daejeon, KR;

Jong-Tae Baek, Daejeon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438663 ; 438685 ; 438648 ; 438660 ;
Abstract

The present invention relates to a method for forming a diffusion barrier layer, the method comprising the steps of: forming an insulation membrane having an opening for exposing a diffusion region to a silicon substrate formed with the diffusion region of a predetermined conductivity; vacuum-evaporating a metal of high melting point to surface and sides of the insulation membrane and to an upper area of the diffusion region, to thereby form a metal layer; and forming on the metal layer a low resistance layer and a diffusion barrier layer according to first and second quick heating treatment steps under nitric or ammoniac atmosphere. Accordingly, the low resistance layer can be thinned out while the diffusion prevention layer can be quickly formed to thereby improve diffusion prevention characteristic and to reduce stress from an interface with the semiconductor substrate. Furthermore, the interface between the silicon substrate and the low resistance layer can be made even to thereby reduce volume change of the low resistance layer, so that junction leakage can be prevented.


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