The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 1999

Filed:

Jul. 14, 1997
Applicant:
Inventors:

Peter Chambers, Phoenix, AZ (US);

Ken Jaramillo, Phoenix, AZ (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395287 ;
Abstract

The present invention comprises a smart retry system for a PCI (peripheral component interconnect) agent in a PCI bus system. The system of the present invention includes an initiator PCI agent and a retry delay register coupled to the initiator PCI agent. The initiator PCI agent is adapted to couple to a PCI bus to communicate with a target PCI agent, via the PCI bus, by initiating a data transaction. The retry delay register is coupled to the PCI agent and the PCI bus. The retry delay register is adapted to receive a delay input via the PCI bus. The delay input describes a latency period of the target PCI agent, wherein the latency period is the amount of the delay. The retry delay register couples the delay input to the initiator PCI agent such that the initiator PCI agent initiates a retry at the expiration of the latency period of the target PCI agent in order to efficiently execute an access to the target PCI agent.


Find Patent Forward Citations

Loading…