The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 1999

Filed:

Mar. 18, 1997
Applicant:
Inventors:

Harold Downey, Tempe, AZ (US);

Timothy Shayne Carlson, Chandler, AZ (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395733 ; 395739 ; 395742 ; 395870 ;
Abstract

A system for transforming computer system interrupts from state based interrupts to event based interrupts. The system of the present invention includes an interrupt acknowledge detection circuit adapted to detect an interrupt acknowledge from a computer system. The interrupt acknowledge detect circuit is coupled to a vector match circuit. The vector match circuit is adapted to receive an interrupt vector from the computer system and determine whether the interrupt vector matches a predetermined interrupt vector within the vector match circuit. The vector match circuit is, in turn, coupled to an interrupt assertion circuit. The interrupt assertion circuit includes an internal interrupt request line and an external interrupt request line. The interrupt assertion circuit functions by asserting an interrupt signal via the external interrupt request line to the computer system in response to receiving a state based interrupt via the internal interrupt request line. Subsequently, the interrupt assertion circuit deasserts the interrupt signal when the interrupt acknowledge is received by the interrupt acknowledge circuit and when the interrupt vector match is received by the vector match circuit. In so doing, the state based interrupt is transformed by the system of the present invention to a event based interrupt signal.


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