The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 1999

Filed:

Apr. 17, 1996
Applicant:
Inventors:

Toshiaki Kawasaki, Osaka, JP;

Akinori Shibayama, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; H03K / ;
U.S. Cl.
CPC ...
365226 ; 36518909 ; 327537 ;
Abstract

A frequency switching circuit is controlled by a low address strobe signal XRAS. A sub-boosted power supply generating circuit is driven at a low frequency generated by a first oscillating circuit during the standby of a DRAM, and at a high frequency generated by a second oscillating circuit during the operation of the DRAM. The sub-boosted power supply generating circuit is driven in a shorter cycle during the operation than during the standby. Consequently, charges are supplied to a booster power source to boost the voltage level thereof. Accordingly, even if the period of the operation state is increased, a drop in voltage level of the boosted power supply caused by a transistor off leak current and a junction leak current can be controlled. Thus, the malfunction of a circuit can be prevented from occurring due to the drop in voltage level of the boosted power supply. The drop in voltage level of the boosted power supply can be controlled during the operation of the DRAM so that it is possible to implement a boosted power supply generating circuit which can prevent the malfunction of the circuit from occurring.


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