The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 09, 1999
Filed:
Feb. 28, 1997
Applicant:
Inventor:
Roger Levinson, Sunnyvale, CA (US);
Assignee:
Exar Corporation, Fremont, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
327540 ; 327530 ; 327538 ; 327546 ; 326 33 ;
Abstract
Method and circuitry for power control in integrated circuits using field effect transistor (FET) technology are disclosed. According to the present invention, for each circuit block that is biased by the power supply voltage a dedicated level shifter is inserted between the block and the power supply. In one embodiment, a switch is also coupled in parallel to the level shifter. The switch is closed when a low external power supply voltage is applied, and opened when a higher power supply voltage is applied. A second embodiment removes the switch and adds a bias generator that supplies a bias voltage to each level shifter.