The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 09, 1999
Filed:
Dec. 18, 1996
Abstract
The digital logic level conversion circuit is for converting a small sinusoidal signal or an unbalanced digital signal to a balanced digital signal with 50% duty ratio, and includes an input level shift circuit, two differential amplifiers, an RS flip-flop, a charge-pump circuit, and a bias circuit. The input level shift circuit for AC coupling a sinusoidal wave with a small amplitude (with a minimum of 0.4 Vpp) and converting it into a middle logic level. The two differential amplifiers is used as comparators having hysteresis each other, operates inversely, and outputs digital signals into the RS flip-flop; the bias circuit for controlling a driving current of the differential amplifiers; the RS flip-flop for driving the charge-pump circuit by outputting a digital signal upon receiving outputs from the differential amplifiers; and the charge-pump circuit for generating a reference potential level of the differential amplifiers.