The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 1999

Filed:

Jan. 05, 1996
Applicant:
Inventor:

Young-Kwon Jun, Seoul, KR;

Assignee:

LG Semicon Co., Ldt., Chungcheongbuk-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438652 ; 438658 ; 438659 ; 438660 ; 438688 ; 438680 ; 438632 ; 438646 ;
Abstract

A method for formation of a wiring layer in a semiconductor device, which includes the steps of: forming a first conductive layer upon a substrate; forming a second conductive layer on the first conductive layer, the second conductive layer having a melting point lower than that of the first conductive layer; and melting (or flowing) the second conductive layer. The first conductive layer is composed of aluminum or an aluminum alloy, and the impurity may be Si or Cu, while the second conductive layer has a melting point lower than that of the first conductive layer by 10.degree. C. or more.


Find Patent Forward Citations

Jun, Young-Kwon. (1999). Process for formation of wiring layer in semiconductor device (U.S. Patent No. 5880023). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5880023

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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