The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 1999

Filed:

May. 20, 1996
Applicant:
Inventors:

Chen-Chi P Chang, Newport Beach, CA (US);

James S Cable, San Clemente, CA (US);

Assignee:

Raytheon Company, Lexington, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 57 ; 437 44 ; 437 45 ; 437 53 ; 437 58 ;
Abstract

A radiation-hard isoplanar cryo-CMOS process suitable for submicron device fabrication reduces channel length to submicron levels. A channel stop (52) is formed after a first polysilicon gate (50) is formed to reduce the space between a n-/n+ source/drain region (67, 68) and the channel-stop region (52). Double gate oxidation steps are performed to increase polyoxide thickness. A thermal oxide masking step is carried out to obtain a thin layer of gate oxide under a second polysilicon gate (60A) for CMOS devices. The process includes two different second polysilicon masking steps to provide dimension control of second polysilicon gates (60A) and to remove bridging of the second polysilicon where the second polysilicon layer (58) is over the first polysilicon layer (48).


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