The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 1999

Filed:

Feb. 28, 1997
Applicant:
Inventors:

Yuko Hagiwara, Tokyo, JP;

Tsukasa Matoba, Kawasaki, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395560 ; 39575004 ;
Abstract

In the interval stop clock mode, the stop clock generating circuit in the system controller generates a stop clock signal that alternates between the active state and the inactive state and supplies the signal to the CPU. This causes the CPU to alternate between a state where the CPU is stopped from executing an instruction and an instruction executable state. In such a computer system, an interrupt type sensing circuit senses various interrupt request signals generated in the system and determines the type of each interrupt request. A stop clock temporary stopping circuit controls the stop clock generating circuit so as to bring the stop clock signal in the inactive state for the period of time specified by the timer value stored in the register corresponding to the determined type of the interrupt request. With this configuration, the performance of the CPU is prevented from falling off in a case where a load is exerted on the CPU as a result of a hardware interrupt to the CPU having occurred in the interval stop clock mode.


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