The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 1999
Filed:
Sep. 10, 1996
Stepan Essaian, Cupertino, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A new ferroelectric memory element is disclosed. The ferroelectric material exhibits little polarization fatigue up to 10.sup.12 switching cycles, long retention and minimal tendency to imprint, producing a nonvolatile, nondestructive readout memory element having low saturation voltage for switching. The memory element can be manufactured using conventional CMOS transistor technology and may include a SrBi.sub.2 Ta.sub.2 O.sub.9 ferroelectric thin-film between metallic electrodes, and an oxide, optionally, conventional SiN.sub.x O.sub.y layer or Si.sub.3 N.sub.4 --SiO.sub.2 bilayer, to protect the substrate from contaminant migration from the ferroelectric layer. Platinum or a metal oxide material (e.g., RuO.sub.2, IrO.sub.2, La.sub.x Sr.sub.1-x CoO.sub.3) may serve as electrodes and provide a lattice matching material for the ferroelectric layer overlying the bottom electrode. Formation of SrBi.sub.2 Ta.sub.2 O.sub.9 or other ferroelectric member of the layered perovskite family may be integrated into conventional CMOS transistor processing.