The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 1999

Filed:

Oct. 28, 1997
Applicant:
Inventors:

George McNeil Lattimore, Austin, TX (US);

Robert Anthony Ross, Jr, Cedar Park, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365 63 ; 36523005 ; 36518904 ; 365156 ; 365190 ;
Abstract

An improved topology for multi-port memory cell layouts in which two or more bitline pairs are required for data transfers is provided. Bitlines are displaced vertically, rather than horizontally. Such vertical spacing provides improved silicon density while reducing bitline capacitance of a memory cell. Additionally, the use of vertically separated bitline pairs allows traditional transitional phase relationships between multi-port operations in multi-port memory implementations. To nullify any sensitivity to an overlapping restore operation, this improved topology includes cross-coupled ports.


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