The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 1999
Filed:
Feb. 26, 1997
Denso Corporation, Kariya, JP;
Abstract
An 8-bit CLA adder is constructed for inputting 4 lower bits a3:0,b3:0 and 4 upper bits a7:4,b7:4 of two input signals to the two 4-bit full adders 2,12 and a carry c-1 to the lowest bit the full adder of the first-stage 2 to generate carries c3,c7 correspondint to the third and seventh bit of the input signals from a carry generation signal g7:0 and a carry propagation signal p7:0 generated by the both adders 2,12 and the carry c-1. The full adder of the second-stage 12 is constructed to add the 4 upper bits a7:4,b7:4 with setting a carry-in as 0 so as to generate a temporary summing signal sz7:4. A logical circuit 14 generates a true sum of 4 upper bits from a carry c3 to the third bit to the forth bit, a temporary sum sz7:4 and a carry propagation signal p7:4 generated by the full adder of the second-stage 12.