Circuit card assembly footprint providing reworkable interconnection

Abstract

A circuit card assembly is provided for use in testing a system wherein the circuit card assembly employs a surface mount device such as a field programmable gate array. The circuit card assembly includes severable traces on a bottom surface of the assembly connecting pairs of near and far vias. The severable traces and the pairs of near and far vias allow the circuit card assembly to be selectively re-worked to accommodate changes to the design of the surface mount device. Hence, a new circuit card assembly need not be designed and fabricated each time the design or programming of the surface mount device is changed. The circuit card assembly includes a network of interconnection paths wherein each path to or from a pin terminal area of the circuit card assembly passes along at least one severable trace between at least one pair of near and far vias along the bottom surface of the assembly. Hence, any selected interconnection path to or from a terminal area can be broken, if desired, by severing the bottom surface trace of the selected path. Likewise, new interconnection paths can be added, if desired, between any two pre-existing paths to or from a terminal area by connecting jump wires along the bottom surface of the assembly between any two appropriate vias. Thus, re-working of interconnection paths of the circuit card assembly, perhaps to accommodate reprogramming of the surface mount device, is made much easier. Moreover, the chances that a re-programming of the surface mount device can be accommodated by re-working, rather than by fabricating a new circuit card assembly, is significantly enhanced.