The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 1999
Filed:
Dec. 03, 1997
Mitsuo Baba, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A phase locked loop comprises a voltage controlled oscillator, a 1/n frequency demultiplier, a phase comparator, and a modulation circuit. The phase comparator is supplied with a first signal which varies according to a reference clock signal and a second signal which varies according to a feedback signal supplied from the 1/n frequency demultiplier, executes phase comparison between the two signals, and controls the oscillation frequency of the voltage controlled oscillator by varying a control voltage by outputting an up-control signal or a down-control signal depending on phase difference between the signals. The modulation circuit generates the first signal by periodically modulating the reference clock signal with a shift width which is larger than the dead zone width of the phase comparator, and supplies the phase comparator with the first signal. Preferably, a 1/2 delay circuit is provided between the 1/n frequency demultiplier and the phase frequency comparator, for delaying the feedback signal by half the shift width. According to the phase locked loop, perfectly linear characteristic around the stationary state and elimination of stationary phase difference are realized.