The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 1999
Filed:
May. 29, 1997
Eric N Mann, Issaquah, WA (US);
John Q Torode, Hunts Point, WA (US);
Cypress Semiconductor Corp., San Jose, CA (US);
Abstract
A programmable circuit for generating a clock signal is disclosed. The present invention provides a clock generator architecture that combines PLL-based clock generator circuitry with an on-chip EPROM in a monolithic clock generator chip. The clock generator allows for electrical configuration of various information including PLL parameters, input thresholds, output drive levels and output frequencies. The various parameters can be configured after the clock generator is fabricated. The parameters can be configured either during wafer sort or after packaging. The clock generator can be erased prior to packaging so programming can be verified.