The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 1999

Filed:

Mar. 28, 1997
Applicant:
Inventors:

Neal Glover, Broomfield, CO (US);

Trent Dudley, Littleton, CO (US);

Assignee:

Cirrus Logic, Inc., Fremont, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ; H03M / ;
U.S. Cl.
CPC ...
371 3711 ; 371 391 ;
Abstract

Apparatus and methods are disclosed for providing an improved system for encoding and decoding of Reed-Solomon and related codes. The system employs a k-bit-serial shift register for encoding and residue generation. For decoding, a residue is generated as data is read. Single-burst errors are corrected in real time by a k-bit-serial burst trapping decoder that operates on this residue. Error cases greater than a single burst are corrected with a non-real-time firmware decoder, which retrieves the residue and converts it to a remainder, then converts the remainder to syndromes, and then attempts to compute error locations and values from the syndromes. In the preferred embodiment, a new low-order first, k-bit-serial, finite-field constant multiplier is employed within the burst trapping circuit. Also, code symbol sizes are supported that need not equal the information byte size. The implementor of the methods disclosed may choose time-efficient or space-efficient firmware for multiple-burst correction.


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