Apparatus for recovering full digital symbol timing

Abstract

A full digital symbol timing recovery apparatus which can recover a symbol timing from a received signal. In the apparatus, a fixed oscillator generates a frequency signal having a constant frequency. An analog-to-digital converter samples the received signal at the constant frequency supplied from the fixed oscillator and converts the analog signal into a digital signal. A matching matches and filters the digitized signal according to a load filter coefficient and adjusts a timing phase. A timing error detector detects a symbol timing error from the output of the matching filter. A subtracter subtracts a predetermined value from the output of the timing error detector and outputs the subtracted result. A numerically controlled oscillator generates a frequency signal which varies periodically according to the output of the subtracter. A read-only-memory in which a plurality of sets of the filter coefficients are prestored receives the output of the numerically controlled oscillator as an address value and loads a set of the filter coefficients corresponding to the address value into the matching filter. A controller generates a symbol clock using a sampling clock of the constant frequency output from the fixed oscillator and delays the symbol clock corresponding to the positions at which repeated data is generated according to the output of the numerically controlled oscillator and outputs the delayed result.