The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 16, 1999
Filed:
Jul. 08, 1996
Alex Gusinov, Lexington, MA (US);
Analog Devices, Inc., Norwood, MA (US);
Abstract
A differential line driver having a pair of transistors arranged as a differential pair for driving a transmission line with a differential logic output signal produced in accordance with a differential logic input signal fed to the base electrodes of the pair of transistors. The differential line driver includes circuitry for suppressing EMI emissions generated by common mode voltage switching transients produced at the collector electrodes of the pair of transistors in response to changes in the differential logic input signal. The common mode voltage switching transient suppression circuitry includes a pair of additional transistors. The differential logic input signal is fed to base electrodes of the additional transistors, and through such additional transistors, to the base electrodes of the pair of transistors of the differential pair. In one embodiment of the invention, the additional transistors are connected in a Darlington pair arrangement with the pair of transistors of the differential pair. While switching transients is the common mode voltage is still present because of the transient base current produced in the pair of transistors of the differential pair, the magnitude of the base current is attenuated by a factor .beta.+1, where .beta. is the beta of the additional (i.e., Darlington pair) of transistors. In another embodiment of the invention, the pair of transistors of the differential pair are NPN transistors and the additional, Darlington connected, pair of transistors are PNP transistors.