The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 1999

Filed:

Aug. 25, 1997
Applicant:
Inventors:

John M Cotton, East Norwalk, CT (US);

Nicholas Necula, Mt. Vernon, NY (US);

Bidyut Parruck, Stratford, CT (US);

Fryderyk Tyra, Stamford, CT (US);

Alex T Wissink, Woodbridge, CT (US);

Enrique Abreu, Huntington, CT (US);

Assignee:

IPC Information Systems, Inc., New York, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
A04L / ;
U.S. Cl.
CPC ...
375354 ; 375371 ; 370518 ; 327144 ;
Abstract

A clocking mechanism with improved fault tolerance for synchronizing a distributed processing system includes a plurality of distributed clock sources. Each clock source may operate as a master clock for synchronizing the operations of the entire system or as a slave to an external clock while remaining available, in a backup capacity, to operate as a master clock in the event of a failure in the previous master clock. A clock selection mechanism is provided in each distributed switch element for selecting the best clock available to each switch element for synchronization. A failure recovery mechanism is provided with fast and automatic recovery in the event of a failure in a master clock. A data extraction mechanism is also provided capable of sampling a bit stream that is not phase-aligned, even in the presence of timing jitter and pulse width distortion, and having provisions for detecting a bit slip.


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