The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 09, 1999
Filed:
Jan. 31, 1996
James W Hively, Sunnyvale, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
Microelectronic devices are formed on a substrate of an integrated circuit. An electrically conductive ground or power plane, and an ElectroStatic Discharge (ESD) protection layer are formed on the substrate. Terminals such as solder ball or wire bond pads are formed on the substrate, and are electrically connected to the devices. The protection layer is patterned such that portions thereof are disposed between the terminals and the plane to define vertical electrical discharge paths. The protection layer is formed of a material such as SurgX.TM. which is normally dielectric, and is rendered conductive in the discharge paths by an electrostatic potential applied to the terminals during an ESD event to shunt the electrostatic potential from the terminals to the plane. Alternatively, the protection layer can be formed between the terminals to define lateral discharge paths.