The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 09, 1999
Filed:
Jan. 22, 1997
Applicant:
Inventor:
Randy M Yim, Pleasanton, CA (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438637 ; 438666 ; 438700 ; 438948 ; 438640 ; 438673 ;
Abstract
The subject invention is directed to a method for producing semiconductor wafers using a simplified hole interconnect process. These wafers include at least one interconnect layer located on a contact or via layer. As contrasted with the semiconductor wafers produced according to the prior art method described above, the contact or via layer of this invention includes a plurality of patterned openings formed therein which are in substantial alignment without offset with each other.