The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 02, 1999
Filed:
Oct. 06, 1997
Applicant:
Inventors:
Howard C Kirsch, Austin, TX (US);
Yen-Tai Lin, Hsinchu, TW;
Assignee:
Vanguard International Semiconductor Corporation, Hsin-Chu, TW;
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
36523006 ; 36518905 ; 36523008 ;
Abstract
A method and a circuit are disclosed by which the semiconductor area is reduced that a local word line decoder for a memory array requires. This reduction in area size has been achieved by eliminating one transistor of a three transistor local wordline decoder and by reducing the number of inputs to the decoder from three to two. The reduction in inputs is made possible by the method of applying to one of the inputs, when low, a voltage signal v.sub.b which is at least one threshold lower than the voltage signal to the other input, when low. This voltage v.sub.b can be derived from the p-substrate bias voltage.