The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 19, 1999
Filed:
Oct. 10, 1996
Norman W Petty, Boulder, CO (US);
Michael A Smith, Broomfield, CO (US);
Douglas A Spencer, Boulder, CO (US);
Lucent Technologies Inc., Murray Hill, NJ (US);
Abstract
A port circuit (108) for a time-division multiplexed (TDM) switching system (100) is designed to effect sub-time-slot operation without external support, as well as to effect conventional, time-slot operation. A clock-frequency multiplier, such as a frequency-multiplexed phase-lock loop (PLL 202), and a multiplier-driven sub-time-slot operation circuit, such as a PLL-driven finite state machine (203), are incorporated into the port circuit. The clock-frequency multiplier and the sub-time-slot operation circuit generate all the additional control signals that are necessary to define sub-time slots and to effect multiple information transfers in a single time slot. The port circuit engages in conventional time-slot transfers with conventional port circuits, whereby it is compatible therewith, and engages in sub-time-slot transfers with other sub-time-slot enabled port circuits, whereby it increases the transfer throughput of the TDM switching fabric. The sub-time-slot operation is selectively enabled and disabled on a per-time-slot basis.