The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 19, 1999
Filed:
Oct. 31, 1997
Applicant:
Inventors:
Yasushi Takahashi, Tachikawa, JP;
Takashi Shinoda, Hamura, JP;
Masamichi Ishihara, Hamura, JP;
Tetsu Udagawa, Iruma, JP;
Kazumasa Yanagisawa, Kokubunji, JP;
Assignee:
Hitachi, Ltd., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365222 ; 36523003 ; 365 63 ;
Abstract
An ordinary read/write operation (normal operation) and a refresh operation are separated from one another and the number of read amplification circuits or in other words, the number of sense amplifiers operating during the normal operation is made smaller than that during the refresh operation. Accordingly, a bit line charge/discharge current during the normal operation can be reduced.
Takahashi, Yasushi. (1999). Semiconductor memory having both a refresh operation cycle and a normal (U.S. Patent No. 5862095). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5862095
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile